| 000 | 00477nam a22001577a 4500 | ||
|---|---|---|---|
| 008 | 230713b |||||||| |||| 00| 0 eng d | ||
| 040 |
_aNational Science Library _cNational Science Library |
||
| 080 |
_aT 681.3.06 _b |
||
| 100 | _aSingh, Chatar | ||
| 245 | _aDesign simulation of NMOS E/D process on Suprem | ||
| 260 |
_aNew Delhi: _bCentre For Applied Research in Electronics, _c1977 |
||
| 300 | _a15p. | ||
| 650 | _aScience | ||
| 653 | _aPlasma | ||
| 942 |
_2udc _cREP |
||
| 999 |
_c53100 _d53100 |
||